Implementation of Neural Network on Parameterized FPGA

Artificial neural networks (ANNs, or simply NNs) are inspired by biological nervous systems and consist of simple processing units (artificial neurons) that are interconnected by weighted connections. Neural networks can be ”trained” to solve problems that are difficult to solve by conventional computer algorithms. This paper presents the development and implementation of a generalized back-propagation multi-layer perceptron (MLP) neural network architecture described in very high speed hardware description language (VHDL). The development of hardware platforms has been complicated by the high hardware cost and quantity of the arithmetic operations required in an online MLP, i.e., one used to solve real-time problems. The challenge is thus to find an architecture that minimizes hardware costs while maximizing performance, accuracy, and parameterization. The paper describes herein a platform that offers a high degree of parameterization while maintaining performance comparable to other hardware based MLP implementations.